Glossary

A

API (Application Programming Interface)

A set of functions and protocols that allow applications to interact with the QRT kernel.

ARM Cortex-M

A family of 32-bit RISC processors designed for embedded and real-time applications. QRT supports the ARMv6-M, ARMv7-M, ARMv8-M Baseline and ARMv8-M Mainline architecture profiles.

ARM EABI (Embedded Application Binary Interface)

The ARM-defined calling and object file conventions a compiler must follow to build QRT and link against libqrt.a.

B

BSP (Board Support Package)

Board-specific code that performs the low-level initialization the kernel needs before booting. QRT ships a default BSP for ARM Cortex-M platforms, initialized with bsp_init().

C

Cancellation

Terminating a thread from another thread with pthread_cancel(). Deferred cancellation takes effect at the thread’s next cancellation point; asynchronous cancellation takes effect immediately.

Cancellation Point

A location where a thread using deferred cancellation checks for a pending cancel request: any blocking system call, or an explicit call to pthread_testcancel().

CFSR (Configurable Fault Status Register)

An ARM Cortex-M register recording the cause of a memory, bus or usage fault. Its raw value is included in memory fault reports.

Cleanup Handler

A function registered with pthread_cleanup_push() that runs when a thread exits or is cancelled, used to release resources.

Console

The kernel’s freestanding printf implementation used for boot and diagnostic output, delivered through the platform-supplied qrt_console_puts() hook.

Context Switching

The process of saving and restoring thread states when switching execution between threads.

CPU Core

The processing unit of a microcontroller responsible for executing instructions.

Cycle Counter

A hardware counter that increments every processor clock cycle, used by profiling to measure worst-case execution times. Cortex-M0+ and Cortex-M23 have none.

D

Deadlock

A state in which two or more threads each hold a lock the other needs and wait for it with an infinite timeout, so none of them can proceed.

Deferred Call

A kernel service request queued from an ISR or callback with qrt_defer_call() and executed after all interrupt handlers have completed, keeping ISR latency minimal.

Detached Thread

A thread whose resources are released automatically on termination and which cannot be joined.

Deterministic Execution

The property of a kernel where thread execution timing is predictable and guaranteed within a defined time frame.

Device Memory

An ARM memory type for peripheral registers and other memory-mapped hardware; accesses are never cached or reordered. Used for the Thread Metadata region.

F

FIFO (First-In-First-Out)

A queueing method where items are processed in the same order they were added, commonly used in message queues.

Floating-Point Unit (FPU)

A hardware module that performs floating-point arithmetic operations.

H

High-Resolution Scheduling

The scheduling mechanism in QRT that programs the System Timer for the next event that falls due instead of relying on periodic ticks, so sleeps, timeouts, timers and time slices resolve to one count of the hardware System Timer.

I

Idle Thread

A low-priority thread that runs when no other threads are ready to execute, often used for power-saving.

Idle Thread Hook

A user function registered with qrt_kernel_idlehookregister() that the idle thread calls during idle periods. It executes in kernel context.

Interrupt Latency

The time between when an interrupt is triggered and when the ISR begins execution.

Interrupt Masking

Disabling interrupts for a short window while the kernel updates its internal state. The longest such window is reported as irq_mask by profiling.

Interrupt Service Routine (ISR)

A subroutine that executes in response to hardware or software interrupts.

IPC (Inter-Process Communication)

In QRT, the exchange of data between threads through kernel objects such as message queues and semaphores.

IRQ (Interrupt Request)

A hardware interrupt line, identified by its number, that the interrupt controller routes to an ISR. The System Timer is registered with the kernel by its IRQ number.

ITM (Instrumentation Trace Macrocell)

An ARM Cortex-M debug component that streams trace data to a debugger; one possible target for console output.

J

Joinable Thread

A thread that another thread can wait for with pthread_join() to collect its exit status. Its resources are released once it has been joined.

K

Kernel

The core component of QRT that manages thread execution, memory protection, and system resources.

Kernel Heap

The memory pool, sized by QRT_CFG_KERNEL_HEAP_SIZE, from which the kernel allocates kernel objects such as message queues, timers and thread control blocks.

L

Linker Script

The linker configuration file that places code and data in memory. With Memory Protection enabled it must define the symbols describing the ROM, RAM, QRT ROM and QRT RAM regions.

M

Memory Fault

An MPU access violation. The kernel reports the faulting thread, address, instruction and CFSR value, terminates the thread, and unlocks any mutexes it holds.

Memory Protection Unit (MPU)

A hardware component that enforces memory access restrictions for different execution contexts.

Memory Region

An address range with fixed access permissions and memory attributes enforced by the MPU. QRT defines six fixed regions and allows additional per-thread regions.

Message Queue

A data structure that allows asynchronous communication between threads in a FIFO manner.

Monotonic Clock

A clock (CLOCK_MONOTONIC) that counts elapsed time from an unspecified starting point and cannot be set.

Mutex (Mutual Exclusion)

A synchronization primitive ensuring only one thread can access a shared resource at a time.

N

Normal Memory

An ARM memory type for code and data such as ROM and RAM; accesses may be cached and reordered, subject to a cache policy such as Write-Back or Write-Through.

O

Opaque Handle

A kernel object identifier such as pthread_t, sem_t or mqd_t whose internal layout is hidden from the application. It must only be passed to the API functions that accept it, never inspected or modified.

P

PendSV (Pendable Service Call)

An ARM Cortex-M system exception reserved for kernel use. The application must not install its own handler for it or change its priority.

Power-Saving Mode

An idle thread mode, enabled with QRT_CFG_IDLE_DEEP_SLEEP_ENABLE, that places the processor in a low-power state when no other threads are ready.

Preemptive Scheduling

A scheduling strategy where higher-priority threads can interrupt lower-priority threads.

Priority-Based Scheduling

The scheduling policy (SCHED_FIFO) in which the highest-priority ready thread always runs, without time slicing among threads of equal priority.

Priority Ceiling Protocol

A priority-inversion mitigation technique that temporarily raises the priority of a thread holding a mutex.

Priority Inheritance Protocol

A mechanism that prevents priority inversion by temporarily raising a lower-priority thread’s priority when it holds a resource needed by a higher-priority thread.

Priority Inversion

A situation where a lower-priority thread prevents a higher-priority thread from running, typically by holding a resource it needs. It is bounded if it ends when the resource is released, and unbounded if intermediate-priority threads can prolong it.

Privileged Mode

An execution level in ARM Cortex-M processors that grants full access to system memory, peripherals, and kernel functions.

Profiling

Measuring the kernel’s timing characteristics on the target. Enabled with QRT_CFG_PERF_ENABLE and read with qrt_perf_read().

PSP / MSP (Process Stack Pointer / Main Stack Pointer)

The two ARM Cortex-M stack pointers; the processor selects one of them as the active stack pointer depending on the current execution context.

R

RAM (Random Access Memory)

The primary volatile memory where threads and system data are stored and executed.

Ready State

The state of a thread that is able to run and is waiting only for the scheduler to select it.

Real-Time Kernel

The core software responsible for managing thread execution in a real-time system.

Realtime Clock

The system-wide clock (CLOCK_REALTIME) representing wall-clock time. It can be read and set by the application.

ROM (Read-Only Memory)

Non-volatile memory, typically flash, that holds kernel and application code and constant data.

Round-Robin Scheduling

A scheduling algorithm that cycles through threads of equal priority, assigning each a fixed time slice.

S

Scheduler

The kernel component responsible for selecting the next thread to execute.

Scheduling Policy

A per-thread attribute selecting how the scheduler treats threads of equal priority: SCHED_FIFO (Priority-Based) or SCHED_RR (Round-Robin, the default).

Semaphore

A synchronization primitive used for signaling between threads or controlling access to shared resources.

Semihosting

A debug mechanism where the target’s I/O requests are serviced by the host debugger; one possible target for console output.

Shareable

An ARM memory attribute marking a region as accessible by more than one bus master, which affects how it may be cached.

Software Timer

A kernel-managed POSIX timer that invokes a callback after a delay or at an interval, driven by the System Timer.

Stack Isolation

Preventing threads from accessing each other’s stacks or kernel memory by giving each thread its own MPU-protected stack region.

Startup Thread

The first application thread, created by qrt_kernel_boot() from the supplied thread attributes and dispatched when the boot sequence completes.

System Call

A request from a thread to the kernel for a service, such as creating a thread or locking a mutex. System calls execute in kernel context and cannot be invoked from ISRs or the idle thread.

System Call Extension

A mechanism that allows applications to invoke custom System Calls.

System Timer

The dedicated hardware timer (also called SysTimer) used for delays, timeouts and scheduling deadlines. Its interrupt must be the only one at the highest priority level.

T

Thread

The basic unit of execution in QRT, consisting of its own stack and execution state.

Thread Attributes

The properties applied when a thread is created, held in a pthread_attr_t object: stack, scheduling policy and priority, detach state, time slice, privilege level and name.

Thread Control Block (TCB)

The per-thread record the kernel keeps for every thread. Its size depends on the kernel configuration (see Thread Control Block in the Memory Footprint chapter).

Thread-Local Storage (TLS)

A per-thread private data mechanism accessed through keys created with pthread_key_create().

Thread Stack Pool

The memory pool, sized by QRT_CFG_STACK_POOL_SIZE, from which dynamically allocated thread stacks are taken.

Tick

One count of the hardware System Timer; the unit in which the kernel reports system time to applications written for tick-based systems. QRT needs no periodic tick interrupt (see High-Resolution Scheduling).

Tick-Resolution Scheduling

A traditional scheduling approach driven by a periodic tick interrupt, in which sleeps, timeouts and time slices resolve to whole tick periods.

Time Slice

The fixed time duration a thread is allowed to execute before being preempted in a round-robin scheduler.

Timeout

A predefined duration after which a blocked thread gives up waiting for an event.

TrustZone

The ARMv8-M security extension that partitions the system into Secure and Non-secure worlds. Supported where available.

U

UART (Universal Asynchronous Receiver-Transmitter)

A serial communication peripheral; a common target for console output.

Unprivileged Mode

A restricted execution mode where thread access to system resources is controlled by the MPU.

W

WCET (Worst-Case Execution Time)

The longest time an operation has taken, measured in CPU cycles. With profiling enabled the kernel records the WCET of each system call, of a context switch and of the System Timer handler.

Weak Symbol

A function definition the linker replaces when a strong definition exists elsewhere. The console output hook qrt_console_puts() is weak so the platform can override it.

Write-Back / Write-Through

Cache policies for Normal memory. Write-Through writes reach main memory immediately, while Write-Back writes stay in the cache until the line is evicted.

Y

Yielding

A thread voluntarily giving up the processor with sched_yield() so that other ready threads of equal priority can run.